| Senior
CAD Engineer - TX
The Senior Engineer will deliver
competitive CAD environment and design methodology for
high-speed/low-power CPU design with fast design
turn-around time.
There are multiple opportunities
available.
Duties & Resp.
 |
Setup CAD environment for custom
circuit design groups |
|
Develop design flows and productive
design methodology |
|
Support backend flows (TR-level STA/EMIR/noise/circuit-level
simulation and EMIR/noise/IVD) and database management
for full-chip level physical integration group
|
|
Design automation to improve
engineering productivity |
Background /Experience
|
MSEE and 7-10 years of relevant
experience required (or equivalent education and
experience) |
|
7+ years of advanced CPU/ASIC design
experience |
|
Hands on experience:
 |
setting up and maintaining CAD
environment for custom design groups including
Cadence Virtuoso, EMIR, noise, circuit simulation,
TR-level STA |
|
supporting full-chip level database
management using version control using C, C++, Perl,
TCL, Shell, and other script languages |
|
Necessary Skills/Attributes Required:
|
Excellent communication and
interpersonal skills |
|
Ability to clearly and precisely
communicate design changes to colleagues |
|
Ability to solve problems on CAD
environment and design methodology issues |
|
Ability to work effectively in a
production environment |
|
Flexible and adaptable to challenging
schedule |
Desired:
|
SPICE-level circuit knowledge and
several years of circuit design experience
|
|
Ability to define and develop physical
integration methodology |
|
Experience working in multi-cultural
environments |
|
|
If you meet the above requirements please send an email to
tstipe@austinprosearch.com. Please include your industry
experience and contact information, or attach your Word
resume. Your information will remain confidential.
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